True, Apple's implementation of DDR on the PowerMac is a half implementation, until the bus from the Processor to the controller is made DDR you wont see as bug a benefit as you could.
A faster system bus, in any system, will make a huge difference though.
Here is a good article from Ars Technica about bandwidth and latency, it does a pretty good job of explaining how a slow sytem bus is the bottleneck of every system (and that includes the newest P4s with a 533 DDR bus.
For a better example of how system bus can affect performance though, check out
the results of a test done over at RAILHead Design a while back. He got a whole bunch of people to do a standard UNIX command, which tests OpenSSL Speed. The Test ignores multiple processors and Altivec (or Velocity Engine), so it gives a good idea of what bus can do for a system.
here are some excerpts:
<BLOCKQUOTE>quote:</font><HR>
You can also see that the 667MHz PowerBook just barely eeked-out a couple more calculations-per-second than the 700MHz iMac, thanks to the PowerBook’s cache and bus.
It’s also noteworthy that the Dual DDR 1.0GHz G4 spanked the Dual non-DDR 1.0GHz. Of course, the SDRAM 1.0GHz has twice the L3 cache, but the DDR 1.0GHz has a faster bus…
<HR></BLOCKQUOTE>
So yes, system bus makes a big difference, more so than L3 cache in any event.
Another point worth mentioning (and this is Motorolas fault, not Apple's) is that the G4 is still using the .18 Micron process, and therefore they can't get anything bigger than 256k for the on chip L2 cache, which also takes away somewhat from the performance of the G4, not to mention that a .13 micron G4 would run cooler, and more efficiently regardless.
I am not saying this is the end of the world, but with P4s that have 533MHz system buses and Athlons that are running with a minimum or a 266 MHz DDR system bus, the 133 bus of the G4 systems seems a little pokey.
--PB